View LTC6907_158657.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

www..com
LTC6907 Micropower, 40kHz to 4MHz Resistor Set Oscillator in SOT-23
DESCRIPTIO U
: 3.3V, -1 : 3.3V, -3 : 3.3V, -10 100 10000
6907 TA02
FEATURES

Supply Current: 36A at 400kHz 1% Frequency Accuracy (from 0C to 70C) Frequency Range: 40kHz to 4MHz One Resistor Sets the Oscillator Frequency -40C to 125C Operating Temperature Range Start-Up Time Under 200s at 4MHz First Cycle After Power-Up is Accurate 150 CMOS Output Driver Low Profile (1mm) SOT-23 (ThinSOTTM) Package
The LTC(R)6907 is a precision programmable oscillator that is versatile, compact and easy to use. Micropower operation benefits portable and battery-powered equipment. At 400kHz, the LTC6907 consumes 36A on a 3V supply. A single resistor programs the oscillator frequency over a 10:1 range with better than 0.65% initial accuracy. The output frequency can be divided by 1, 3 or 10 to span a 100:1 total frequency range, 40kHz to 4MHz. The LTC6907 is easily programmed according to this simple formula: i 10, DIV Pi n = V + 4MHz 50k , N = 3, DIV Pin = Open = * N R SET 1, DIV Pin = GND
APPLICATIO S

Low Cost Precision Programmable Oscillator Rugged, Compact Micropower Replacement for Crystal and Ceramic Oscillators High Shock and Vibration Environments Portable and Battery-Powered Equipment PDAs and Cellular Phones
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
Micropower Clock Generator
LTC6907 3V TO 3.6V 0.1F /10 /3 /1 V+ GND DIV OUT 40kHz TO 4MHz
SET RSET 50k TO 500k
6907 TA01
SUPPLY CURRENT (A)
GRD
U
U
OUT
The LTC6907 is available in the 6-lead SOT-23 (ThinSOT) package. Contact LTC Marketing for a version of the part with a shutdown feature or lower frequency operation.
Typical Supply Current vs Frequency
1000 CLOAD = 5pF T = 25C
10
10
100 1000 OUTPUT FREQUENCY (kHz)
6907fa
1
www..com
LTC6907
AXI U RATI GS
ABSOLUTE
PACKAGE/ORDER I FOR ATIO
TOP VIEW OUT 1 GND 2 DIV 3 6 V+ 5 GRD 4 SET
(Note 1) V + ................................................................- 0.3V to 6V DIV to GND .................................... - 0.3V to (V + + 0.3V) SET to GND ................................... - 0.3V to (V + + 0.3V) GRD to GND .................................. - 0.3V to (V + + 0.3V)
ORDER PART NUMBER LTC6907CS6 LTC6907IS6 LTC6907HS6 S6 PART MARKING* LTBTX
Operating Temperature Range (Note 7) LTC6907C .......................................... - 40C to 85C LTC6907I ............................................ - 40C to 85C LTC6907H ........................................ - 40C to 125C Specified Temperature Range (Note 7) LTC6907C ............................................... 0C to 70C LTC6907I ............................................ - 40C to 85C LTC6907H ........................................ - 40C to 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
S6 PACKAGE 6-LEAD PLASTIC TSOT-23
TJMAX = 150C, JA = 200C/W
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is indicated by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL f PARAMETER Frequency Accuracy (Notes 2, 3)
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. V+ = 3V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V+ = 3V to 3.6V 400kHz f 4MHz 400kHz f 4MHz, LTC6907C 400kHz f 4MHz, LTC6907I, H

MIN
TYP 0.25
MAX 0.65 1 1.3 500
UNITS % % % k %/C %/V % % % ppm/kHr ppm ppm
RSET f/T f/V
Frequency-Setting Resistor Range Frequency Drift Over Temp (Note 3) Frequency Drift Over Supply (Note 3) Timing Jitter (Peak-to-Peak) (Note 4) RSET = 158k V+ = 3V to 3.6V, 50k RSET 500k
SET 500k Pin 3 = Open, 50k RSET 500k Pin 3 = 0V, 50k RSET 500k
50 0.005 0.06 0.12 0.28 0.60 300 888 2809
Pin 3 = V +, 50k R
Sf
Long-Term Stability of Output Frequency (Note 9) Duty Cycle Operating Supply Range (Note 8) Power Supply Current
Pin 3 = V + Stability Over 1 Year Stability Over 10 Years

DC V+ IS
43 3
50 40 36 305 275
57 3.6 55 48 406 366
RSET = 500k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 400kHz) RSET = 50k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 4MHz)
V + = 3.6V V + = 3V V + = 3.6V V + = 3V V+ = 3.6V V+ = 3V V+ = 3.6V V+ = 3V

VIH VIL IDIV
High Level DIV Input Voltage Low Level DIV Input Voltage DIV Input Current (Note 5) Pin 3 = V + Pin 3 = 0V
3.1 2.6 0.5 0.2 -2 1 -1 2
V + = 3.6V
2
U
% V A A A A V V V V A A
6907fa
W
U
U
WW
W
www..com
LTC6907
ELECTRICAL CHARACTERISTICS
SYMBOL VOH PARAMETER High Level Output Voltage (Note 5)
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. V+ = 3V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V + = 3.6V V + = 3V VOL Low Level Output Voltage (Note 5) V + = 3.6V V + = 3V tr tf VGS OUT Rise Time (Note 6) OUT Fall Time (Note 6) GRD Pin Voltage Relative to SET Pin Voltage V + = 3.6V V+ = 3V V + = 3.6V V+ = 3V -10A IGRD 0.3A
MIN IOH = - 100A IOH = - 1mA IOH = - 100A IOH = - 1mA IOL = 100A IOL = 1mA IOL = 100A IOL = 1mA

TYP 3.57 3.45 2.97 2.80 0.08 0.25 0.07 0.25 10 25 10 25
MAX
UNITS V V V V
3.40 3.10 2.8 2.5
0.2 0.8 0.2 0.8
V V V V ns ns ns ns
-10
10
mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Some frequencies may be generated using two different values of RSET. For these frequencies, the error is specified assuming that the larger value of RSET is used. Note 3: Frequency accuracy is defined as the deviation from the fOUT equation. Note 4: Jitter is the ratio of the peak-to-peak deviation of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Note 5: Current into a pin is given as a positive value. Current out of a pin is given as a negative value. Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels.
Note 7: The LTC6907C is guaranteed to meet specified performance from 0C to 70C. The LTC6907C is designed, characterized and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LTC6907I is guaranteed to meet specified performance from -40C to 85C. Note 8: Consult the Applications Information section for operation with supplies higher than 3.6V. Note 9: Long term drift on silicon oscillators is primarily due to the movement of ions and impurities within the silicon and is tested at 30C under otherwise nominal operating conditions. Long term drift is specified as ppm/kHr due to the typically non-linear nature of the drift. To calculate drift for a set time period, translate that time into thousands of hours, take the square root and multiply by the typical drift number. For instance, a year is 8.77kHr and would yield a drift of 888ppm at 300ppm/kHr. Ten years is 87.7kHr and would yield a drift of 2,809 ppm at 300 ppm/kHr. Drift without power applied to the device may be approximated as 1/10th of the drift with power, or 30ppm/kHr for a 300ppm/kHr device.
6907fa
3
www..com
LTC6907
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Frequency Error vs Power Supply Voltage
0.060%
0.040%
T = 25C CLOAD = 5pF
1.0%
0.020% 0.000% -0.020%
0.4%
0.2% RSET = 50k
FREQUENCY ERRROR (%)
FREQUENCY ERROR (%)
FREQUENCY ERROR (%)
-0.040% -0.060%
3
3.1
3.2 3.3 3.4 SUPPLY VOLTAGE (V)
Typical Supply Current vs Frequency
1000
CLOAD = 5pF T = 25C
SUPPLY CURRENT (A)
SUPPLY CURRENT (A)
: 3.3V, -3 : 3.3V, -10 100
RSET VOLTAGE (V)
: 3.3V, -1
10
10
100 1000 OUTPUT FREQUENCY (kHz)
Output Waveform, 400kHz
V+ = 3.3V
0.5V/DIV
0.5V/DIV
4
UW
3.5
Typical Frequency Error vs Temperature
V+ V+ = 3V 0.8% CLOAD = 5pF 0.6%
Typical Frequency Error vs RSET
0.150%
0.100%
T = 25C V+ = 3V CLOAD = 5pF
0.050% 0.000% -0.050% -0.100% -0.150%
0% -0.2% -0.4%
-0.6%
RSET = 500k
RSET = 50k RSET = 500k
-0.8% -1.0% -45 -25 -5
15 35 55 75 95 115 135 TEMPERATURE (C)
6907 G02
3.6
6907 G01
0
100
500 200 300 400 SET RESISTOR (k OHMS)
600
6907 G03
Typical Supply Current vs Load Capacitance
1000 900 800 700 600 500 400 300 200 100 0
10000
6907 G04
VSET vs Temperature (VSET is the Voltage Measured at the SET Pin)
0.8
T = 25C
0.75 0.7 0.65 0.6 0.55 0.5 0.45 0.4 -45 -25 -5
V+ = 3V
RSET = 50k, 3.0V RSET = 50k, 3.6V RSET = 500k, 3.0V RSET = 500k, 3.6V
0
10
30 40 50 20 LOAD CAPACITANCE (pF)
60
6907 G05
15 35 55 75 95 115 135 TEMPERATURE (C)
6907 G06
Output Waveform, 4MHz
V+ = 3.3V
6907 G07
6907 G08
500ns/DIV
50ns/DIV
6907fa
www..com
LTC6907
U
or better temperature coefficient. For lower accuracy applications, an inexpensive 1% thick-film resistor may be used. Limit the capacitance in parallel with RSET to less than 10pF to reduce jitter and to ensure stability. The voltage on the SET pin is approximately 650mV at 25C and decreases with temperature by about -2.3mV/C. GRD (Pin 5): Guard Signal. This pin can be used to reduce PC board leakage across the frequency setting resistor, RSET. The GRD pin is held within a few millivolts of the SET pin and shunts leakage current away from the SET pin. To control leakage, connect a bare copper trace (a trace with no solder mask) to GRD and loop it around the SET pin and all PC board metal connected to SET. Careful attention to board layout and assembly can prevent leakage currents. The use of a guard ring provides additional shielding of leakage currents from the SET pin and is optional. If unused, the GRD pin should be left unconnected. V+ (Pin 6): Voltage Supply (3V to 3.6V). A 0.1F decoupling capacitor should be placed as close as possible to this pin for best performance.
PI FU CTIO S
OUT (Pin 1): Oscillator Output. The OUT pin swings from GND to V+ with an output resistance of approximately 150. For micropower operation, the load resistance must be kept as high as possible and the load capacitance as low as possible. GND (Pin 2): Ground. DIV (Pin 3): Divider Setting Input. This three-level input selects one of three internal digital divider settings, determining the value of N in the frequency equation. Tie to GND for /1, leave floating for /3 and tie to V+ for /10. When left floating, the LTC6907 pulls Pin 3 to mid-supply with a 2.5M resistor. When Pin 3 is floating, care should be taken to reduce coupling from the OUT pin and its trace to Pin 3. Coupling can be reduced by increasing the physical space between traces or by shielding the DIV pin with grounded metal. SET (Pin 4): Frequency Setting Resistor Input. Connect a resistor, RSET, from this pin to GND to set the oscillator frequency. For best performance use a precision metal or thin-film resistor of 0.1% or better tolerance and 50ppm/C
BLOCK DIAGRA
6 2
V+ GND
VSET VGRD 650mV VSET RSET 5 GRD 4 SET
ISET = IFB
BUFFER VSET
+
-
W
U
U
FREQUENCY-TO-CURRENT CONVERTERS fOSC IFB IFB THREE-LEVEL INPUT DETECTOR
V+ 5M DIV 5M DIVIDER SELECT 3
VSET
OP AMP
VOLTAGE CONTROLLED OSCILLATOR (MASTER OSCILLATOR) fOSC = 4MHz * 50k RSET
fOSC PROGRAMMABLE DIVIDER (n) (/1, /3, /10)
150 DRIVER OUT 1
6907 BD
6907fa
5
www..com
LTC6907
EQUIVALENT CIRCUIT OF OSCILLOSCOPE OR FREQUENCY COUNTER PROBE
TEST CIRCUIT
LTC6907 SUPPLY VOLTAGE V 0.1F GND DIV GRD SET RSET 0.01% 10ppm/C CPROBE
+
CTEST
OUT RPROBE 10M
6907 F01
CTEST = 1/(1/5pF - 1/CPROBE) = 7.5pF FOR A 15pF SCOPE PROBE
Figure 1. Test Circuit with 5pF Effective Load
EQUIVALE T I PUT A D OUTPUT CIRCUITS
V+ V+ V+ 200 TOTAL OUTPUT RESISTANCE
6
20 4 800pF 2 GND
6907 F02
Figure 2. V + Pin
6
V+ 5M
3
DIV 5M
2
GND
6907 F05
Figure 5. DIV Pin
6
U
UU
6
6 1k 5
SET
GRD
2
GND
6907 F03
2
GND
6907 F04
Figure 3. SET Pin
Figure 4. GRD Pin
6
V+ fOUT
1
OUT
150
2
GND
6907 F06
Figure 6. OUT Pin
6907fa
www..com
LTC6907
U
so
THEORY OF OPERATIO
The LTC6907 is a precision, resistor programmable oscillator (see Block Diagram). It generates a square wave at the OUT pin with a period directly proportional to the value of an external resistor, RSET. A feedback circuit measures and controls the oscillator frequency to achieve the highest possible accuracy. In equilibrum, this circuit ensures that the current in the SET pin, ISET, is balanced by IFB. IFB is proportional to the master oscillator frequency, so we have the relationship: ISET = IFB = VSET * OSC * COSC Where COSC is a precision internal capacitor: COSC = 5pF for the LTC6907 Solving for the oscillator period:
tOSC = 1 OSC = VSET * COSC ISET
tOSC =
1 OSC
= RSET * COSC
(4)
The period and frequency are determined exclusively by RSET and the precision internal capacitor. Importantly, the value of VSET is immaterial, and the LTC6907 maintains its accuracy even though VSET is not a precision reference voltage. The digital dividers shown in the Block Diagram further divide the master oscillator frequency by 1, 3 or 10 producing:
(1)
OUT =
(2) and
OSC N
(5)
This is the fundamental equation for the LTC6907. It holds regardless of how the SET pin is driven. When a resistor, RSET, is connected from the SET pin to ground, we have the relationship: VSET = RSET ISET
Table 1. Output Frequency Equations
PART NUMBER LTC6907 FREQUENCY
tOUT = N * tOSC
(6)
Table 1 gives specific frequency and period equations for the LTC6907. The Applications Information section gives further detail and discusses alternative ways of setting the LTC6907 output frequency.
(3)
PERIOD
DIVIDER RATIOS
OUT
4MHz 50k * = N RSET
R tOUT = N * 250 ns * SET 50k
10, DIV Pin = V + N = 3, DIV Pin = Open 1, DIV Pin = GND
6907fa
7
www..com
LTC6907
Selecting RSET and the Divider Ratio The LTC6907 contains a master oscillator followed by a digital divider (see Block Diagram). RSET determines the master oscillator frequency and the three level DIV pin sets the divider ratio, N. The range of frequencies accessible in each divider ratio overlap, as shown in Figure 7. This figure is derived from the equations in Table 1. For any given frequency, power can be minimized by minimizing the master oscillator frequency. This implies maximizing RSET and using the lowest possible divider ratio, N. The relationship between RSET, N and the unloaded power consumption is shown in Figure 8. The supply current decreases for large values of RSET. Refer to the section titled "Jitter and Divide Ratio." Minimizing Power Consumption
SUPPLY CURRENT (A)
OUTPUT FREQUENCY (kHz)
APPLICATIO S I FOR ATIO
The supply current of the LTC6907 has four current components: * Constant (Independent V+, OUT and CLOAD) * Proportional to ISET (which is the current in RSET) * Proportional to V+, OUT and CLOAD * Proportional to V+ and R
LOAD
An approximate expression for the total supply current is:
I+ 7A + 6 * ISET + V + * OUT * (CLOAD + 5pF ) + or, in terms of VSET , V V+ I 7A + 6 * SET + V + * OUT * (CLOAD + 5pF ) + RSET 2 * RLOAD
+
V+ 2 * RLOAD
VSET is approximately 650mV at 25C, but varies with temperature. This behavior is shown in the Typical Performance Characteristics. Power can be minimized by maximizing RSET, minimizing the load on the OUT pin and operating at lower frequencies. Figure 9 shows total supply current vs frequency under typical conditions. Below 100kHz the load current is negligible for the 5pF load shown.
8
U
10000 /1 /3 /10 1000 100 10 10 100 RSET (k) 1000
6907 F07
W
UU
Figure 7. RSET vs Desired Output Frequency
160 140 120 100 80 60 40 20 0 10 100 RSET (k) 1000
6907 F08
ISUPPLY
CLOAD = 0 V+ = 3V : DIV = -1 TA = 25C
Figure 8. Unloaded Supply Current vs RSET
Guarding Against PC Board Leakage The LTC6907 uses relatively large resistance values for RSET to minimize power consumption. For RSET = 500k, the SET pin current is typically only 13A. Thus, only 13nA leaking into the SET pin causes a 0.1% frequency error. Similarly, 500M of leakage resistance across RSET (1000 * RSET) causes the same 0.1% error. Achieving the highest accuracy requires controlling potential leakage paths. PC board leakage is aggravated by both dirt and moisture. Effective cleaning is a good first step to minimizing leakage. Another effective method for controlling leakage is to shunt the leakage current away from the sensitive node through a low impedance path. The LTC6907 provides a signal on the GRD pin for this purpose. Figure 10 shows a PC board
6907fa
www..com
LTC6907
U
Power Supply Rejection
: 3.3V, -1 : 3.3V, -3 : 3.3V, -10
APPLICATIO S I FOR ATIO
1000 CLOAD = 5pF T = 25C
SUPPLY CURRENT (A)
100
10
10
100 1000 OUTPUT FREQUENCY (kHz)
Figure 9. Supply Current vs Frequency over DIV Settings
layout that uses the GRD pin and a "guard ring" to absorb leakage currents. The guard ring surrounds the SET pin and the end of RSET to which it is connected. The guard ring must have no solder mask covering it to be effective. The GRD pin voltage is held within a few millivolts of the SET pin voltage, so any leakage path between the SET pin and the guard ring generates no leakage current. Start-Up Time When the LTC6907 is powered up, it holds the OUT pin low. After the master oscillator has settled, the OUT pin is enabled and the first output cycle is accurate. The time from power-up to the first output transition is given approximately by: tSTART 64 * tOSC + 100s The digital divider ratio, N, does not affect the startup time.
LTC6907 1 OUT V+ GRD 2 GND 5 GUARD RING 6 NO SOLDER MASK OVER THE GUARD RING
3
DIV RSET
SET
4
6907 F10
Figure 10. PC Board Layout with Guard Ring
6907fa
W
UU
The LTC6907 has a very low supply voltage coefficient, meaning that the output frequency is nearly insensitive to the DC power supply voltage. In most cases, this error term can be neglected. High frequency noise on the power supply (V+) pin has the potential to interfere with the LTC6907's master oscillator. Periodic noise, such as that generated by a switching power supply, can shift the output frequency or increase jitter. The risk increases when the fundamental frequency or harmonics of the noise fall near the master oscillator frequency. It is relatively easy to filter the LTC6907 power supply because of the very low supply current. For example, an RC filter with R = 160 and C = 10F provides a 100Hz lowpass filter while dropping the supply voltage only about 10mV. Operating the LTC6907 with Supplies Higher Than 3.6V The LTC6907 may also be used with supply voltages between 3.6V and 5.5V under very specific conditions. To ensure proper functioning above 3.6V, a filter circuit must be attached to the power supply and located within 1cm of the device. A simple RC filter consisting of a 100 resistor and 1F capacitor (Figure 11) will ensure that supply resonance at higher supply voltages does not induce unpredictable oscillator behavior. Accuracy under higher supplies may be estimated from the typical Frequency vs Supply Voltage curves in the Typical Performance Characteristics section of this data sheet.
V+ 3.6V TO 5.5V DC 100 1F LTC6907 V+ GND DIV OUT GRD SET RSET
10000
6907 F09
NO LEAKAGE CURRENT
6907 F11
Figure 11. Using the LTC6907 at Higher Supply Voltages
LEAKAGE CURRENT
9
www..com
LTC6907
Alternative Methods for Setting the Output Frequency Any means of sinking current from the SET pin will control the output frequency of the LTC6907. Equation 2 (repeated below) gives the fundamental relationship between frequency and the SET pin voltage and current: tOSC = 1 OSC = VSET * 5pF ISET (2)
V+
APPLICATIO S I FOR ATIO
This equation shows that the LTC6907 converts conductance (ISET/VSET) to frequency or, equivalently, converts resistance (RSET = VSET/ISET) to period. VSET is the voltage across an internal diode, and as such it is given approximately by:
VSET VT * Loge ISET IS
ISET 25.9mV * Loge - 2.3mV/ C 82 * 10 -18 A
where VT = kT/q = 25.9mV at T = 300K (27C) IS 82 * 10-18 Amps (IS is also temperature dependent) VSET varies with temperature and the SET pin current. The response of VSET to temperature is shown in the Typical Performance graphs. VSET changes approximately -2.3mV/ C. At room temperature VSET increases 18mV/octave or 60mV/decade of increase in ISET. If the SET pin is driven with a current source generating ISET, the oscillator output frequency will be:
OSC
25.9mV * Loge - 2.3mV / C 82 * 10 -18 A
ISET 5pF ISET
10
U
Figure 12 and Figure 13 show a current controlled oscillator and a voltage controlled oscillator. These circuits are not highly accurate if used alone, but can be very useful if they are enclosed in an overall feedback circuit such as a phase-locked loop.
LTC6907 V+ GND DIV OUT GRD SET 49.9k
6907 F12
W
UU
4MHz TO 400kHz 0A TO 11.25A
10k
Figure 12. Current Controlled Oscillator
LTC6907 V+ V+ GND DIV OUT GRD SET 499k
4MHz TO 400kHz
RSET 56.2k
6907 F13
VCTRL 0V TO 0.675V (VSET)
Figure 13. Voltage Controlled Oscillator
Jitter and Divide Ratio At a given output frequency, a higher master oscillator frequency and a higher divide ratio will result in lower jitter and higher power supply dissipation. Indeterminate jitter percentage will decrease by a factor of slightly less than the square root of the divider ratio, while determinate jitter will not be similarly attenuated. Please consult the specification tables for typical jitter at various divider ratios.
6907fa
www..com
LTC6907
PACKAGE DESCRIPTIO
0.62 MAX
0.95 REF
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
S6 Package 6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.80 - 0.90 0.01 - 0.10 0.30 - 0.45 6 PLCS (NOTE 3) 0.09 - 0.20 (NOTE 3) 1.90 BSC
S6 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
6907fa
11
www..com
LTC6907
TYPICAL APPLICATIO S
Sine Wave Oscillator
1MHz LTC6907 3V TO 3.6V 0.1F V+ GND DIV OUT GRD SET RSET 200k L1 100H C1 220pF
6907 TA05
0.1F 1k
3V TO 3.6V 0.1F /10 /3 /1
Low Power 62.5Hz to 6.25kHz Sine Wave Generator (IQ < 1.5mA)
fOSC = 400kHz TO 40kHz 3V 1 1F 2 3 V+ OUT LTC6907 GND GRD DIV SET 4 56.2k 499k fOSC VCTRL 0V-0.6V 5
74HC4520 1 3V 2 16 C2 0.1F 10 7 8 9 15 CLOCK A ENABLE A VDD ENABLE B RESET A VSS CLOCK B RESET B Q1A Q2A Q3A Q4A Q1B Q2B Q3B Q4B 3 4 5 6 /2 /4 /8 /16
RELATED PARTS
PART NUMBER LTC1799 LTC6900 LTC6902 LTC6903/LTC6904 LTC6905 LTC6905-XXX LTC6906 DESCRIPTION 1kHz to 33MHz ThinSOT Oscillator, Resistor Set 1kHz to 20MHz ThinSOT Oscillator, Resistor Set Multiphase Oscillator with Spread Spectrum Modulation 1kHz to 68MHz Serial Port Programmable Oscillator 17MHz to 170MHz ThinSOT Oscillator, Resistor Set Fixed Frequency ThinSOT Oscillator Family, up to 133MHz Micropower 10kHz to 1MHz ThinSOT Oscillator, Resistor Set COMMENTS Wide Frequency Range Low Power, Wide Frequency Range 2-, 3- or 4-Phase Outputs 0.1% Frequency Resolution, I2C or SPI Interface High Frequency, 100sec Startup, 7ps RMS Jitter No Trim Components Required 12A Supply Current of 100kHz, 0.65% Frequency Accuracy
6907fa LT 0506 REV A * PRINTED IN USA
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
Setting Frequency to 0.1% Resolution with Standard Resistors
LTC6907 V+ GND DIV OUT GRD SET RA RA < RB/10 1% THIN FILM RB 50k TO 500k 0.1% THIN FILM
6907 TA03
Trimming the Frequency
LTC6907 2MHz WITH 2.5% RANGE 3V TO 3.6V 0.1F V+ GND DIV OUT GRD SET RA 97.6k RB 5k
6907 TA04
40kHz TO 4MHz
C4 1F
3V C3 0.1F R61 10k R51 5.11k R31 51.1k R11 100k
LTC1067-50 1 2 3 4 5 6 7 R21 20k 8 V+ NC V
+
CLK AGND V
-
16 15 14 13 12 11 10 9 R22 20k fSINE = fOSC 64 R62 14k R52 5.11k R32 51.1k
SA LPA BPA
SB LPB BPB
SINEWAVE OUT
11 /32 12 /64 13 /128 14 /256
HPA/NA HPB/NB INV A INV B
RH1 249k fOSC 64 RL1 51.1k
6907 TA06
CLOCK-TUNABLE LOWPASS FILTER WITH A STOPBAND NOTCH AT THE 3rd HARMONIC fOSC *3 64
(
)
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

▲Up To Search▲

Price & Availability of LTC6907

	To Download LTC6907 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .